Category: I.T. & Communications
ARM s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. This position is an excellent opportunity for an experienced RTL design engineer to join a creative, multi-disciplinary, multi-cultural team developing IP that is crucial to technology platforms across the industry! The Systems IP team engages with the world s foremost technology companies, driving innovation into all areas that compute is possible, to help build better solutions for the billions of people using our technology worldwide. The team is responsible for the creation of a range of sophisticated Arm IP, like Interconnects/NoCs, MMUs and ISPs used in multiple innovative products for many different market segments! The SMMU is a key component of the Arm Architecture and implements one of the most significant algorithms in modern computing systems: address translation and memory protection. The SMMU team is developing next-generation Arm SMMU implementations targeting high-end mobile, networking, automotive and enterprise markets. Responsibilities: Analyse proposed specifications to understand implementation challenges and opportunities, working with the architects to improve and refine the ideas Plan, track and coordinate tasks for yourself and your team Work with modelling, verification, performance analysis and back-end implementation colleagues to ensure your design meets all the functional and performance requirements Improve design methodology to meet evolving needs Lead and mentor other team members as they learn and solve new problems. You will be responsible for development of one or more functional blocks of the IP. Possess an in-depth understanding of all the aspects of the products successful delivery, including low-power design techniques, awareness of the impact of design decisions on system performance, ability to produce designs that are area efficient, and the verification techniques that are employed to ensure high-quality, innovative designs Required Skills and Experience: Demonstration of a strong delivery record of high quality, low power, high performance sophisticated micro-architecture and RTL design using System Verilog, Verilog or VHDL in reasonable timescales. Be able to navigate and make high-level design trade-offs and articulate the rationale for those choices. Knowledgeable on ASIC (or FPGA) design methodology, IP signoff methods with a deep understanding on timing/area/complexity trade-offs for sophisticated data path designs 'Nice To Have' Skills and Experience: Team leadership and mentoring experience Knowledge of memory system interconnect protocols (e.g. AMBA ACE-Lite or AXI) Solid understanding of SystemVerilog Assertions (SVA) and formal verification Experience of a scripting language such as Perl, Tcl, C shell, Python Knowledge of a number hardware verification languages e.g. SystemVerilog You have already worked on Functional Safety product development for the Automotive market (applying standards such as ISO 26262 and/or IEC 61508) We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.